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Academic Areas: Flexible-hybrid electronic devices and system integration

Prof. Wu has published more than 20 research articles in high-quality journals and conference proceedings and holds several patents in both China and the U.S. He is a member of ASME, IEEE and MRS and serves as an associate editor for "Precision Engineering" (2015-19). He received various Intel awards including the Intel Distinguished Invention Awards and was selected by the Chinese government’s Thousand Talents Plan Program for Young Professionals in 2016, he is also a recipient of Society of Manufacturing Engineers' Robert J. Hocken Outstanding Young Manufacturing Engineer Award (2016).

Academic Degrees

Georgia Institute of Technology (Georgia Tech), Atlanta, Georgia                     Ph.D          Sep 2012

Huazhong University of Science and Technology (HUST), Wuhan, China       Bachelor    July 2007

Professional Experience

Professor, Huazhong University of Science and Technology                                         June 2016 - Present

Senior Process T/D Engineer, Intel Corporation, USA                                                    March 2013 – June 2016

Research Engineer, Georgia Institute of Technology                                                      Oct 2012 – Feb 2013

Graduate Research Assistant/PhD Candidate, Georgia Institute of Technology            Aug 2007 – Sep 2012

Selected Publications

Journal Publications

1. Wu, H., A systematic approach for task allocation and coordination in a distributed design environment, submitted, ASME Journal of Computing and Information Science in Engineering.

2. Huang, Y.A., Duan, Y., Ding, Y., Bian, J., Xiao, L., Wu, H., Su, Y., Yin, Z., A hyper-stretchable energy harvester based on directly printed, in situe polarized nanofibers of self-similar configuration, submitted, ACS Nano.

3. Wu, H., Gao, W., Yin, Z., Materials, devices and systems of soft bioelectronics for precision therapy, In press, Advanced Healthcare Materials, 2017.

4. Wu, H.*, Huang, Y.A., Xu, F., Duan, Y., Yin, Z. *, Energy harvesters for wearable and stretchable electronics: from flexibility to stretchability, Advanced Materials. 2016, 28, 9881-9919.

5. Wu, H.*, Yang, C., and Melkote, S.N., Modeling and analysis of interaction between grits and silicon in diamond wire sawing, International Journal of Advanced Manufacturing Technology. 2015, 84(5): 907-913.

6. Wu, H. *, Wire sawing technology: A state-of-the-art review, Precision Engineering. 2015, 43: 1-9.

7. Wu, H. * and Melkote, S.N., Analysis of handling stresses in thin silicon solar wafers generated by a rigid vacuum gripper, ASME Journal of Manufacturing Science and Engineering. 2015, 138(3), 034501.

8. Wu, H., Yang, C. , and Melkote, S.N., Effect of reciprocating wire slurry sawing on surface quality and mechanical strength of as-cut solar silicon wafers, Precision Engineering. 2014, 38: 121-126.

9. Wu, H., and Melkote, S.N., Effect of crystal defects on mechanical properties relevant to cutting of multicrystalline solar silicon, Materials Science in Semiconductor Processing. 2013, 16(6): 1416- 1421.

10. Yang, C. *, Wu, H., and Cooper, I., Effect of sub-grains and crystal defects on monolike Si solar cell performance, Materials Science & Application. 2013, 4:103-108.

11. Yang, C. *, Wu, H., Melkote, S., and Danyluk, S., “Comparative analysis of fracture strength of slurry and diamond wire sawn multicrystalline silicon solar wafer”, Advanced Engineering Materials. 2012, 15(5): 358-365.

12. Wu, H., Melkote, S. *, and Danyluk, S., Effects of carbide and nitride inclusions on diamond scribing of multicrystalline silicon for solar cells, Precision Engineering. 2013, 37(2): 500-504.

13. Wu H., Melkote S. *, and Danyluk S., Mechanical strength of silicon wafers cut by loose abrasive slurry and fixed abrasive diamond wire sawing, Advanced Engineering Materials. 2012, 14(5): 342-348.

14. Wu, H., and Melkote, S. *, Effect of crystallographic orientation on ductile scribing of crystalline silicon Role of phase transformation and slip, Materials Science and Engineering: A. 2012, 549:200-205.

15.  Wu, H., and Melkote, S. *, Study of ductile-to-brittle transition in single grit diamond scribing of silicon: Application to wire sawing of silicon wafers, ASME Journal of Engineering Materials & Technology, 2012, 13, 041011.


1. Wu, H.,  A diamond wire with a non - cutting surface, China Patent # 201220451262.6. 

2. Wu, H.,  A diamond system for cutting crisp and hard materials, including silicon,China Patent # 201210326414.4.

3. Brun, X., Agrawal, A., Wu, H., Ou, S., Mamodia, M., Shi, H., “Structures to mitigate contamination on a back side of a semiconductor substrate”, US Patent Application, P14/998,096.

4. Wu, H., Singleton, C., Duggan, S., and Williams, P., “Application of surfactant for improved cutting quality and bit life during wafer planarization”, Intel Invention Disclosure # 115041, June 2014.

5. Wu, H., Brun, X., “Novel diamond blade design for reduction of micro0cracks (side-wall damage) during singulation”, Intel Invention Disclosure # 107638, August 2013.

6. Wu, H., Yu, J., Singleton, C., Duggan, S., “Two cut process for optimized throughput, bit life and cut quality in surface planarization of thick film”, Intel Invention Disclosure # 110032, November 2013.

7. Wu, H., Brun, X., Singleton, C., “Novel approach for wafer level planarization”, Intel Invention Disclosure # 105267, May 2013.

8. Singleton, C., Wu, H., “Automatic cutting bit angle adjustment for surface planarization process”, Intel Invention Disclosure # 113792, April 2014.

9. Singleton, C., Duggan, S., Yu, J., Wu, H., “Film-coated surface planarization height control using Non-Contact Gauge (NCG)”, Intel Invention Disclosure # 108233, September 2013.

10. Singleton, C., Wu, H., Duggan, S., Yu, J., “In-process cutting bit height measurement for improved surface planarization cutting accuracy”, Intel Invention Disclosure # 113813, April 2014.

11. Singleton, C., Wu, H., “Partial cut for enabling Non-Contact Gauge (NCG) measurements in surface planarization of thick film”, Intel Invention Disclosure # 108199, September 2013.


Awards and Honors

1.Robert J. Hocken Outstanding Young Manufacturing Engineer Award (2016), Society of Manufacturing Engineers (SME), March 2016. ( 2016-Outstanding-Young-Manufacturing-Engineers/)

2.Thousand Talents Plan (1000 Plan) Program for Young Professionals, Chinese Central Government, March 2016.

3.Hundred Talents Program, Hubei Province, March 2016.

4.Intel Distinguished Inventions Award (Intel Invention Disclosure # 107638), Sep 2013.

5.Intel Distinguished Inventions Award (Intel Invention Disclosure # 115041), Dec 2014.

6.Intel ATTD Divisional Recognition Award, July 2015.

7.HUST student of academic excellence (1% based on GPA ranking), Oct 2004.


1. Highly wearable and high density EMG sensor arrays for human machine interface, National Natural Science Foundation of China (NSFC), Grant # 91648115, 2017/01 – 2019/12, RMB 670,000.

2. Advanced packaging technology and flexible electronics, Chinese Central Government (1000 plan), 2016/06-2019/06, RMB 3,000,000.

3. Flexible hybrid integration through polymer-on-silicon, State Key Laboratory of Digital Manufacturing Equipment and Technology open source project, Huazhong University of Science Technology, 2016/06 – 2018/06, RMB 300,000.

4. Development of Debond process for Intel’s through-silicon-via program, Intel Corporation, 2014/01- 2016/06, USD 5,500,000.

5. Development of Wafer level planarization process and tool for EmiB program, Intel Corporation, 2013/03-2015/01, USD 1,790,000.

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